Making SIMD Code Scale to Any Vector Width

Search Get started Making SIMD Code Scale to Any Vector Width Leave a Comment / Technical / By Nemi Verploegh I will be using x86 naming throughout this post, but the concepts apply to other architectures too. Basic familiarity with SIMD…

From the article

Search Get started Making SIMD Code Scale to Any Vector Width Leave a Comment / Technical / By Nemi Verploegh I will be using x86 naming throughout this post, but the concepts apply to other architectures too. Basic familiarity with SIMD and x86 assembly is assumed; uops.info and Intel’s intrinsics guide explain any instruction you don’t recognize.

A lot of SIMD code, particularly in the graphics programming space, use vec3/vec4 types all over the place. The issue is that this typically doesn’t scale beyond the SSE instruction set. In this post I want to share how you can “transpose” those vectors into lanes to scale your math operations beyond just those typical 4 component XMM registers, and have the efficiency scale up to 8 or 16 wide vectors (or maybe 32 wide vectors, if we ever get…

Share this resource